 Fri Feb 10 16:34:45 2023, Huy Tuong Cao, Infrastructure, Clean & Bake, Nitrogen gas tank ready to use 
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Cao,
Today I fixed the final bit related to the nitrogen gas tank, which is to apply sealing tape to M-NPT connector of the hose to prevent
leakage
(file: AirGunSealed.jpg)
After application of the tape, no audible leak can be heard from connection between the hose and the air gun. |
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Thu Jun 2 21:55:02 2022, Jon, Update, Cameras, FLIR Camera Setup
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The new FLIR A70 infrared camera has arrived. Tyler and I unpacked it in the lab yesterday. In less than an hour, we succeeded in powering it on and
connecting it to the lab network. We have assigned it the static IP address 192.168.1.6.
Online Configuration Portal
The FLIR camera can be configured, as well as stream live data, through a web browser interface. It can |
 Fri Jun 3 13:03:33 2022, Jon, Update, Cameras, FLIR Camera Setup
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Summary
I have installed the requisite software on chimay for interfacing the FLIR A70 camera in Python. There are two packages required from
FLIR:
Spinnaker SDK, which provides the low-level camera drivers and a C/C++ API.
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Mon Jun 6 17:11:48 2022, Jon, Update, Cameras, FLIR Camera Setup
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Today I tested the Spinnaker/PySpin software installations (detailed in ELOG #4) with the FLIR
camera connected to chimay. It works!
Example codes
I was able to run several of the PySpin example codes. In particular, there is one which connects to the camera and streams |
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Tue Jun 21 18:31:49 2022, Cassidy and Phoebe, Update, Cameras, IR Absorbing Screen and FLIR Camera Setup
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Today we set up the IR absorbing screen and the camera on the optical table, as well as tested that the camera was functioning as expected (picking up heat
sources beyond the screen).
Screen Setup
The screen was set up by clamping it between two rectangular posts on each side. First, two posts
were set up with 22 in. between them (thus allowing the screen to span a total distance of up to 24 in. when clamped down). To best stabilize the screen |
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Tue Jul 26 14:10:35 2022, Cassidy, Update, Cameras, Optical Post Replacement and Realignment
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Today I replaced the 3" optical post that the camera rests on with a 2" optical post in order for the screen to correctly fill out the camera's FOV. The
3" post is now in the glass optics cabinet next to the FLIR camera configuration box, wrapped in the protective materials from the 2" post for safekeeping.
There were no issues with the physical replacement of the post, except that the fork clamp on the post needs to be on one of the perpendicular, |
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Wed Mar 29 16:00:36 2023, Pamella, Update, Cameras, FLIR project
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Today Pamella and Tyler started work in the updates for the FLIR project.
We trie for the first time cover the mirrors with aluminum foil and run the
code with this.
We work in figured out how the python codes works with real datas.
To do:
Understand how get the real datas and how to compere that
with the old datas.
Starting test with the FLIR and mirrors with aluminum foil in with the power on.
Testing the FLIR camera more times with the mirrors |
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Mon Oct 23 11:28:05 2023, Tyler, Update, Cameras, FLIR Camera Code Updates
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The past week I've been spending time going through the FLIR code on gitlab. Initially, it had appeared that our measurements with the camera had differed
about 2 degrees C from what the thermocouple was giving (Ref ELOG 181). Upon inspection of the FLIR streaming code, I noticed a few issues:
1. The emissivity
value wasn't set correctly (was 0.999 originally, should be about 0.95).
2. The ambient temperature was set to about 21.6 C (71 F).
3. The distance given |
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Thu Aug 3 18:03:42 2023, Shane, Jon, Update, CDS, Anti-Aliasing chassis complete
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We finished installing the internal power supply cables in the anti-aliasing chassis today, which concludes its assembly. Work on AI, BI, BO chassis still
underway. |
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Mon Aug 7 13:58:46 2023, shane, Update, CDS, internal power supply cables done for AI chassis
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Finished assembling and installing the aLigo chassis internal power supply cables in the anti-imaging chassis today. Tested for continuity and everything
looked good. Chassis lid still secured with two temporary screws because I'm not sure what the correct size is. |
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Tue Aug 8 17:03:22 2023, Shane, Jon, Update, CDS, Binary input chassis finished
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Finished assembly of the binary input chassis today, including DC on/off switch and LED installation. external cable assemblies still needed, but internal
work done. |
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Wed Aug 9 17:35:26 2023, Shane, Update, CDS, Binary output chassis finished
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Finished the internal wiring for the binary output chassis today, which completes its assembly. Also secured ribbon cables and chassis lid with their respective
screws. Note: one of the spade lugs' internal metal piece is a little loose and had to be reinserted after falling out once. Seemed secure after this,
and I checked continuity on everything and it was all good. |
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Wed Aug 16 16:55:40 2023, Shane, Jon, Update, CDS, external power supply cables finished
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| All four external power supply cables for the CyMAC chassis are now assembled. Using them now to test if chassis power up correctly. |
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Wed Aug 16 17:17:02 2023, Shane, Jon, Update, CDS, Binary input chassis powering correctly
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Binary input chassis passed power-on test, and is lighting up as expected. Binary output chassis also successfully powered on. AA and AI chassis not powering
on correctly, need to do some debugging to find the problem. |
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Thu Sep 14 17:05:38 2023, Shane, Jon, Update, CDS, Timing chassis setup and testing
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Tested the setup today for the timing chassis (intended to provide the timing reference for the CyMAC). Was able to read the correct frequency, but voltage
was significantly lower than needed. Still identifying source of problem, and looking into the relationship between the supportable ohm load and the voltage. |
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Fri Sep 29 17:27:30 2023, Shane, Jon, Update, CDS, Timing chassis assembly progress (CyMAC)
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Worked on timing chassis assembly today for the CyMAC, settled on layout (see attachment 1). Frequency synthesizer and frequency divider tentatively mounted.
Next steps involve putting together and installing an LED and DC on/off switch assembly like the one in the binary input chassis (attachment 2 for comparison;
orange and black wires in BI chassis analogous to red and black wires in timing chassis). Will also use front and back panels of BI chassis as a template |
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Mon Oct 9 16:59:21 2023, Shane, Jon, Update, CDS, timing chassis power cable and AI chassis testing for CyMAC
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[Shane, Jon]
Today's CyMAC work:
Finished assembling external power supply cable for the timing
chassis (see attached image)
Also did some debugging of AA and AI chassis re: power issues. After testing voltages at various test points
on the power regulator board (TP1-TP6) in the AA chassis, it seems like it's the source of the problem. Used bench DC power supply to test, running 15V, |
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Mon Oct 23 18:02:23 2023, Shane, Jon, Update, CDS, Timing chassis assembly complete
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Concluded assembly of timing chassis for CyMAC today; see attachment 1 for interior set up of chassis. Installed front and rear panels, wired on/off switch
and LED assembly, and tested to confirm everything is powering on correctly. Also tested the outputted timing reference that will go to DAC and ADC adapter
boards (see attachment 2 for output 1 and attachment 3 for output 2). |
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Fri Oct 27 15:28:30 2023, Shane, Update, CDS, AA and AI chassis for CyMAC powered on and functional
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CyMAC updates: Switched out the faulty power regulator boards in the Anti-Aliasing and Anti-Imaging chassis. Both chassis are now powering up correctly
with lights on and the correct voltages in/out of the power regulator board. Images attached. All chassis for the CyMAC now functional, so next step is
mounting everything in the rack. |
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Mon Oct 30 18:15:13 2023, Shane, Update, CDS, CyMAC chassis mounted and progress on power connections
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All CyMAC chassis mounted in electronics rack today, and shelf for monitor also mounted. Images attached. Assembled grounding cables for power connections,
and attached the timing chassis to power & gnd. Powered on successfully with correct voltages in expected places. After power test, everything was turned
off and unplugged. Next steps: attach grounding cables to other four power supply chassis. Also attach anti-aliasing, anti-imaging, binary input and binary |
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Wed Nov 1 18:24:01 2023, Shane, Update, CDS, CyMAC Power connections made
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Finished power connections today for the CyMAC chassis. Images attached. Had to switch the shrink fork terminals on the
power supply cables to shrink ring terminals, but was able to get everything connected and secured. Upcoming work: turning on power supply and testing
voltages/checking everything is turning on and lighting up correctly.
Configuration is as follows:
Topmost Sorensen: +24V (reserved |
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Thu Nov 2 17:14:36 2023, Shane, Jon , Update, CDS, CyMAC set up permanentized
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CyMAC connections have been finalized and made permanent. Also tested voltages, which are all looking good. Warning:
power is on. Do not touch power supply terminals or screws connected to grounding cables (see attached images 4 and 5; green wires on back of power supply
with black and yellow covers, and exposed positive and negative terminals on back of power supply). |
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Mon Nov 13 11:23:54 2023, Jon , Update, CDS, CyMAC testing
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[Jon, Shane, Luis]
My repair of the internal ribbon connecting the ADC to the adapter board resolved the timing signal problem. After this repair, we were able to
start the front-end IOP model and checked out the RTS diagnostic screens (pictured below). All indicator lights were green except for the DK flag (indicating |
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Wed Nov 22 15:46:50 2023, Shane, Update, CDS, DB25 signal connections for FROSTI heaters
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[Shane, Jon]
Installed new DC smart switch in electronics rack, configured power connections. Images attached. Attached is a diagram of the male DB25 signal connections
to be used for FROSTI heaters. Also included below is table detailing pin and signal configuration.
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Thu Nov 23 12:34:44 2023, Jon, Update, CDS, DB25 signal connections for FROSTI heaters
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Update: I was able to put the FROSTI power controller on the lab network. It is connected to the switch in the top of the rack and is assigned
a static IP address of 192.168.1.12 and an NDS hostname of relay1.
The controller can be remotely accessed through an SSH command line interface as well as an HTML webpage, which can be opened from any web browser |
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Mon Dec 4 21:27:53 2023, Shane, Update, CDS, ADC-DAC loopback test results
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Here are the test results from today's ADC-DAC loopback tests. Channels 14 and 15 were the only ones behaving abnormally. Not sure what the issue is, but
needs further debugging. The DAC output was as expected for both of them, but the corresponding ADC inputs were the same regardless of what offset was
used (hovering around values of -4 and -5). NOTE: all measurements listed in the attached table are 'averages' in the sense that the ADC inputs and DAC |
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Mon Dec 11 12:58:57 2023, Shane, Luis, Update, CDS, DAC-ADC loopback test debugging
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[Luis, Shane]
Working on debugging last week's weird results for the ADC-DAC loopback test for channels 14 and 15. With DAC output channels 12-15 connected
to ADC input channels 12-15: tried setting matrix coefficients for channels 12-15 to 1, and as with last week's results, DAC is outputting as expected
for all three channels and ADC is not reading in the signal (hovering around -4,-5) for channels 14 and 15. Channels 12 and 13 still reading in correctly. |
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Wed Jan 31 14:37:26 2024, Shane, Summary, CDS, path directions for CyMAC model and parts library
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Path to cds parts library in Matlab simulink: /usr/share/advligorts/src/src/epics/simLink. File name CDS_PARTS.mdl
Path to user models: /opt/rtcds/usercode/models,
using file name c1msc.mdl |
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Fri Feb 2 16:56:56 2024, Jon, Update, CDS, RTS model implemented for FROSTI RTD readouts
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Summary
Today I finished implementing an RTS model to read out the integrated FROSTI RTDs (temperature sensors) via the CyMAC. The model is
named "MSC" and is located at cymac:/opt/rtcds/usercode/models/c1msc.mdl. We successfully tested it with the heater elements operating in vacuum at low
power (12 VDC), finding them to reach an average steady-state temperature of 160 C. |
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Mon Feb 19 14:40:21 2024, Shane, Update, CDS, MEDM screen for FROSTI temp readouts
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Here's the latest draft of the MEDM screen for the FROSTI heating elements' temperature readouts. Note that the MEDM screen isn't actually this grainy,
this just happens to be a photo of the lab monitor's screen off a phone. |
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Fri Feb 23 15:01:48 2024, Shane, Update, CDS, Latest draft of MEDM screen for FROSTI readouts
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Here's the latest draft of the MEDM screen for the FrOSTI temp and power readouts. Also, debugged the text readout boxes so they're now correctly reading
out the live temperature and power values. |
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Thu Feb 29 17:16:48 2024, Shane, Update, CDS, MEDM screen for FROSTI T/P readouts
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Here's the latest draft of the MEDM screen for the FROSTI temp and power readouts, now with a button linking to the c1msc file display. Size/color/label
are all changeable, if adjustment is needed. Checked in execute mode as well, and it's working correctly. Also noticed that the MEDM file name has been
changed to FROSTI.adl, which I'm noting here for future reference. Still in medm_sandbox directory. |
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Tue May 7 20:34:31 2024, shane, Update, CDS, frosti MEDM screen update
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[Luis, Shane]
Here is the updated MEDM screen, with new orientation and updated labeling to reflect the actual positions of the heater elements. Note that
indices start at T0 to be consistent with simulink model, though in the previous elog for the FROSTI layout the heater elements are labeled 1-8.
Also,
we finally learned how to take a screenshot on debian. |
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Mon Jul 8 17:01:45 2024, Shane, Update, CDS, New CyMAC internal layout
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[Jon, Shane]
Internal layout of CyMAC has been updated (labeled image attached) to accommodate the replacement of the two ribbon cables. Looking down
on the chassis from the front, and going from left to right, the new placement is as follows: BIO card, DAC adapter board, ADC adapter board, DAC card,
ADC card. NOTE: As part of ADC-DAC loopback testing, we're disconnecting from the FROSTI readout chassis and using the cables to connect directly from |
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Tue Jul 9 18:19:50 2024, Shane, Update, CDS, ADC-DAC loopback testing and IOLAN installation
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[Shane, Jon]
Finished ADC-DAC loopback testing today (see attached xlsx file or access directly here).
All looks well with the first 8 channels, with the gain hovering just under 2. Also edited c1msc model in simulink to add channels 7-15 (the last 8 channels),
and changed the rate back to 64K. See image 1 for the updated c1msc model. The last 8 channels are also looking good and show no problems, with slightly |
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Tue Jul 16 18:43:07 2024, Shane, Update, CDS, ADC-DAC loopback testing and IOLAN installation
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UPDATE:
Follow up ADC-DAC loopback testing now complete, matching all the ADC channels to a single DAC channel, and then matching all the DAC channels
to a single ADC channel (see attached xlsx file or access directly here).
Also note c1msc model file has been updated to include the second set of 16 ADC channels. The newly added channels also have their own filter modules, |
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Fri Aug 2 13:50:22 2024, Shane, Update, CDS, Serial Comm. Test (Agilent Turbo Pump)
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Did a brief communication test with the agilent turbo pump today, to see if we could get serial communications up and running for it. Used a simplified
python script with sockets package to establish a connection and send a simple command to query the pump's operational status. The connection was successful,
and had no issues establishing. The command also sent successfully, and received a response. The response didn't make sense, though, as all the possible |
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Tue Sep 3 18:24:17 2024, Tyler, Update, CDS, Cymac Timing Chassis Issue
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[Tyler, Jon]
The timing chassis used for the cymac has been shut off due to an unknown issue causing its supplied current to fluctuate. All real-time
models will be suspended until a solution is found.
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Tue Oct 1 19:41:23 2024, Shane, Update, CDS, CyMAC Timing Chassis Issue
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[Shane, Luis]
Summary of the issue we've been having with the timing chassis: when we connect only the Valon 5015 to power, the timing signal comes
out of it sinusoidal as expected and the status lights are steady and all looks good. As soon as we connect the 3010 to power, the signal (both coming
out of the 5015 and coming out of the 3010) go flat and the status lights of the 5015 start to flicker.
We think what may be going on is that the 5015 |
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Thu Oct 17 13:24:23 2024, Shane, Update, CDS, Timing Chassis issue identified
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[Ma, Luis, Shane]
Working theory for the timing chassis issues had been that the 1A breaker was tripping and
causing the failure of the Valon 5015 and 3010 to output the timing signal correctly. We just tried bypassing the breaker, running 6 V on the benchtop
power supply (set the current limit to 1.5A), with the 5010 generating the sine wave to pass to the 3010. All worked correctly, and there were no issues. |
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Fri Oct 25 10:56:30 2024, Shane, Update, CDS, Timing Chassis fixed and reinstalled
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[Ma, Shane]
We replaced the 1A breaker in the timing chassis today with a 4A one, and tested that all is working
well. The chassis successfully outputted the correct signal (image attached). The real time models have also been restarted and the CyMAC diagnostics screen
is showing all green flags. Timing chassis has been closed up and reinstalled in the server rack. |
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Thu Nov 14 11:58:05 2024, Shane, Update, CDS, Turbo pump connection troubleshooting
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Attempted connection to the TV551 turbo pump through Varian/Agilent's software on spica. Successful connection established, and we are able to read out
al the readings associated with the pump (status, temperature, etc) through the software, which is actually pretty extensive and well organized. Was able
to stop and restart the pump with no issues. Serial communications seem to be working fine, and the current serial settings (baud rate 9600, serial type |
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Wed Dec 4 16:01:23 2024, Shane, Update, CDS, Vac serial interfacing troubleshooting update
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Update on the issue with serial interfacing for the TV 551 turbo pump: Tried a new test today, to see if the commands being sent to the controller were
actually getting through at all, since we know that no response is getting back to us. To test this, I sent the start/stop command for the pump, disconnected
the serial connection and instead connected the controller to spica so I could run the manufacturer's software, and used the manufacturer's sotware to |
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Tue Jan 28 13:30:46 2025, shane, Update, CDS, Serial comms testing update
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Attempted to communicate with the smaller vac pump (TwissTor 74) via Agilent software today. Was able to communicate with the pump via python serial connection
code as usual, with no issues. When using the manufacturer software though, it was unable to 'locate' the pump and failed to connect to it. So manufacturer
software works for the big (older) pump, but not the smaller, newer one. Unclear if this is somehow related to the fact that using the manufacturer software |
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Wed Feb 19 13:44:48 2025, Shane, Update, CDS, Vac serial interfacing update
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[Jon, Shane]
Debugging update for vac system serial communications: we were able to successfully connect the smaller
turbo pump to the Varian (manufacturer) software today by plugging the controller db9 directly into spica, and verified that the pump was able to send
and receive information. Still no success on communication with the larger pump via python serial code, though. Issue potentially lies in the pinout mapping |
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Thu Feb 27 18:22:21 2025, Shane, Update, CDS, Ongoing work in server rack and desk area (1119)
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As part of the vacuum communications debugging process, there is ongoing work in the server rack and desk area in 1119. Please be careful not to move any
of the materials left out in the server rack or on the work bench. |
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Tue Mar 4 10:47:03 2025, Shane, Update, CDS, Vac system pinouts
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Attached here are the pinouts, as we currently know them, for the vacuum system. The three items focused on here are the Agilent TwissTorr 74 FS turbo pump
(the smaller/newer pump) and controller, the Agilent TV 551 Navigator turbo pump (the larger/older pump) and controller, and the Eight-channel Perle IOLAN
SDS8 terminal server. The 'field' pinouts in the attached tables refer to the DB9 end of the RJ45F to DB9F converter. |
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Wed Mar 5 12:16:28 2025, Shane, Update, CDS, Vac system communications update
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[Shane, Jon]
Update on the serial interfacing with the vacuum system: both turbo pumps are now able to successfully communicate through the code. The older
pump, for unknown reasons, required a newer version of the communication syntax (despite the newer, small pump being able to communicate fine with the |
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Wed Mar 5 18:13:20 2025, Shane, Update, CDS, vac system comms
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[Shane, Jon]
Update on the serial interfacing with the Inficon VGC503 pressure gauge: We began setup of the Inficon pressure gauge today. We configured the ethernet
setting via USB and assigned it a static IP address of 192.168.1.30, which is listed in the network table on the lab wiki. It is showing up on the network |
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Mon Mar 10 17:03:52 2025, Shane, Update, CDS, Pressure Gauge successful connect
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Vac system serial interfacing update: the pressure gauge is now able to communicate successfully through the code. It's been set to a static ip of 192.168.1.30,
on port 8000. |